CMX7861 Programmable Baseband Interface0 pages

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PP7861/2 March 2012

CMX7861

FirmCODEC®

(programmable DSP/FPGA/microcontroller baseband Interface)
64-pin VQFN

Introduction

CMX7861 Brief Description

The CMX7861 FirmCODEC® is
specifically designed as
front-end support to a DSP,
FPGA or Microcontroller.
It provides the necessary
analogue to digital and digital to
analogue conversion, plus a
number of ‘smart’ functions that
assist the DSP/FPGA/
Microcontroller.
The device is a combination of
codec, embedded signal
processing and auxiliary systems
that together improve overall
system performance, reduce
development time and overall
system cost.
Built on FirmASIC® technology,
the CMX7861 FirmCODEC®
provides flexibility, adaption and
product evolution.

The CMX7861 FirmCODEC ® is a general-purpose, dual-channel baseband interface device for
use in DSP/FPGA/Microcontroller based systems. The device is a combination of codec,
embedded signal processing and auxiliary system support functions that, together, allow
simple interfacing to analogue and digital systems.

Applications

General purpose DSP/FPGA/
Micro analogue interface

Sensors
Control systems
Telemetry/SCADA/Data

Digital narrowband radio
Digital Mobile Radio (DMR)
APCO P25
Software Defined Radio (SDR
<6.25kHz to 25kHz channels
Worldwide compatibility
(ETSI, FCC part 90, ARIB)

I/Q Radio/RF interface
Tx/Rx: direct connect to zero

IF transceiver
Simple external RC filters
Digital filters configurable for
multiple RF channel spacings
(DMR default)
I/Q trims

Single-ended and differential interface options are provided and I/Q-based operation is
supported. The device can also be used in radio systems operating with channel bandwidths
up to 50kHz, interfacing RF devices to baseband DSP/microcontroller, performing the main
data conversion and auxiliary operations for monitoring and control.
Fully-programmable on-chip digital channel filters can be utilised for signal conditioning
purposes. Intelligent auxiliary ADC, DAC and GPIO sub-systems perform valuable functions
and minimise host interaction and host I/O resources. Two synthesised system clock
generators develop clock signals for off-chip use. The C-BUS/SPI master interface expands
host C-BUS/SPI ports to control external devices.
The CMX7861 operates from a 3.3V supply and includes selectable power saving modes. It is
available in a 64-VQFN package.

Features

Key Benefits

Dual signal/channel codecs
144ksps modem mode, 76ksps codec mode
Two 16-bit ADCs and Two 14-bit DACs
Programmable input and output gain
Selectable input/output configuration
Differential/single ended inputs/outputs
Programmable input/output gain
Speaker driver output
Digital signal/channel filters
Two fully programmable digital filters
Filter design and configuration support
Codec and modem operating modes
C-BUS host serial interface
FIFOs and streaming data transfer
Master SSP interface
External slave device control
Serial Flash connection
Pass-through mode
Low-power 3.0V to 3.6V operation
Multiple power-saving options
Small 64-pin VQFN Package

Intelligent front-end to a
DSP/FPGA/microcontroller
Flexible interfacing options
General-purpose dual channel codec with
‘smart’ functions
I/Q-based operation is supported
‘Smart’ functions:
Reduce DSP/microcontroller processing
overhead

Reduce DSP/microcontroller power consumption

Eliminate the need for the DSP in some
applications

Auxiliary functions reduce overall system
component count, size and cost
Built on FirmASIC ® technology the
CMX7861 FirmCODEC ® assists:
Reduced development time
Provides a fast route to market
Flexibility and forward evolution
CML’s commitment to maximum support

CMX7861
FirmCODEC®

Analogue
Systems

Analogue
Interface

DSP
FPGA

Microcontroller

System Diagram
© 2012 CML Microsystems Plc

1

Digital
Systems