Filter Design HDL Coder0 pages

Filter Design HDL Coder

Generate HDL code for fixed-point filters

The Filter Design HDL Coder™ product adds hardware implementation capability to MATLAB . It lets you

generate efficient, synthesizable, and portable VHDL and Verilog code for fixed-point filters that are designed

with DSP System Toolbox™ software, for implementation in ASICs or FPGAs. It also automatically creates

VHDL and Verilog test benches for quickly simulating, testing, and verifying the generated code.

Key Features

■ Generates synthesizable IEEE 1076 compliant VHDL code and IEEE 1364-2001 compliant Verilog code for

implementing fixed-point filters in ASICs and FPGAs

■ Controls the content, optimization, and style of generated code

■ Provides options for speed vs. area tradeoffs and architecture exploration, including distributed arithmetic

■ Generates VHDL and Verilog test benches for quick verification and validation of generated HDL filter code

■ Generates simulation and synthesis scripts

The generated VHDL and Verilog code adheres to a clean HDL coding style that enables architects and designers

to quickly customize the code if needed. The test bench feature increases confidence in the correctness of the

generated code and saves time spent on test bench implementation.

Working with the Filter Design HDL Coder

Filter Design HDL Coder is integrated with the graphical user interface (GUI) and command line of DSP System

Toolbox to provide a unified design and implementation environment. You can design filters and generate VHDL

and Verilog code either from the MATLAB command line or from DSP System Toolbox using FilterBuilder or

Filter Design and Analysis Tool (FDATool) GUIs.

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Generating HDL code through the FDATool GUI.

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Accelerating the pace of engineering and science

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