Calibre DESIGNrev0 pages

Fast, Flexible, and Robust Chip Finishing
Physical Verification
Calibre DESIGNrev
D A T A S H E E T
BENEFITS:
■■ Complete chip finishing platform
■■ Lightning-fast and easily
customizable chip assembly
process
■■ Accurate, fast debugging for the
most complex designs
■■ Tight integration with the Calibre
platform provides a full range of
signoff-quality verification
features
■■ Rapid layout review handles the
largest files with ease
CCalibre DESIGNrev’s robust and flexible chip finishing and review capabilities let users speed
through full-chip design completions and tape-outs for even the largest GDSII/OASIS files with
Calibre confidence.
■■ Fast and easy navigation for
viewing/zooming/panning layouts
Fast and Flexible Chip Finishing Platform
■■ Express drawing engine
Calibre® DESIGNrev loads and displays the largest layouts on a typical
engineering workstation in seconds. The incremental loading capability
provides a scalable solution that is less dependent on I/O, and more efficient
for multi-site collaboration. Calibre DESIGNrev also provides an extensive set of
debugging features, including net extraction and visualization, overlay, and
editing. Users can directly manipulate native GDSII/OASIS database objects
such as cells, instances, polygons, edges and text. Calibre DESIGNrev’s net
extraction and editing features provides easier setup and migration between
process nodes for CAD engineers, as well as accurate, easy-to-use net
visualization. Its extensive capabilities, combined with its user-friendly design,
make Calibre DESIGNrev the high-performance tool for fast, accurate, and
efficient chip tapeout preparation.
The express drawing engine provides fast
and easy navigation, enabling rapid
viewing/zooming/panning of layouts, as
well as layer visibility.
■■ Instant pan and zoom
■■ Loads massive files in seconds on
typical workstations
■■ Fast, flexible overlay and compare
functionality
■■ Fast layout viewer integrated with
lithography simulators and editors
supports GDSII and fracture
formats
■■ Extensive batch and interactive
editing
■■ Calibre WORKbench TCL/TK API
■■ Support for GDSII, OASIS and
Gzipped layouts
■■ Emphasize selected layers while other
chip structures remain visible
Emphasize selected layer for point
inspection.
Calibre DESIGNrev effectively manages the
most challenging chip assemblies with its ability to process massive databases
in very short runtimes while using a small memory footprint.
w w w. m e nto r. co m
■■ Extremely fast database merge
with minimal memory
■■ Full range of advanced debugging
capabilities
Express Drawing Engine
Lightning-Fast Chip Assembly
FEATURES:
■■ Fast database format converter
and optimizer
■■ Direct read OpenAccess, Milkyway,
and LEF/DEF