Calibre xL0 pages

Parasitic Extraction for Inductance
Circuit Verification
Calibre xL
D A T A S H E E T
BENEFITS:
■■ Full-chip, high-performance,
parasitic inductance extraction
provides highly correlated field
solver and silicon-tested accuracy
for analog, RF, and custom digital
nanometer designs.
■■ Powerful mutual inductance
engine enables extraction of the
effect of coupling between
different nets.
Parasitic inductance (noise, distortion, impedance mismatch and jitter) can cause chip failure
if not accounted for in parasitic extraction. At higher frequencies, inductance can shift the frequency of oscillation in a VCO (lower graphic) and must be taken into account.
Managing Inductive Effects in Nanometer Designs
With increasing operating frequencies, interconnect lines begin to exhibit
inductive effects that can significantly influence chip behavior and
performance. Parasitic on-chip inductance extraction is crucial for accurate
physical verification (simulation) and timely tape-out of high-frequency RF,
mixed-signal, and custom digital nanometer designs.
Calibre® xL offers designers full-chip, fast, and accurate extraction of frequencydependent loop inductance and loop resistance, and automatically accounts
for return path change with frequency. Results of Calibre xL extraction highly
correlate with field solvers and have silicon-tested accuracy.
■■ Parasitic self-inductance
extraction integrated with Calibre
xRC parasitic RC extraction data
enables accurate analysis of high
frequency effects in nanometer
technology.
■■ Accurate extraction of frequency
dependent loop inductance and
resistance ensures optimized
modeling of on-chip physical
effects.
■■ Efficient, realizable model order
(RLC) reduction provides
manageable netlists and mixedlevel outputs for ease of
re-simulation without loss of
accuracy.
Calibre xL Inductance Solution
■■ Return-path selection and netbased extraction frequency
selection offers increased
flexibility in performance and
improved accuracy.
On-chip inductance modeling is challenging because inductive couplings are
long- range, and the return paths for the current are frequency-dependent and
difficult to determine or predict. A partial inductance approach, which does
not require knowledge of the current return path, results in prohibitively large
and dense inductance matrices for any reasonable size design and produces
netlists that are unmanageable for today’s dynamic simulators.
■■ Seamless invocation, and
integration to Calibre LVS, xRC,
xACT 3D, and RVE, through Calibre
Interactive enables cross-probing
and debugging of results in
popular layout environments.
The Calibre xL inductance calculation engine has a unique, accurate, and
efficient way of calculating self-loop inductances in complex designs.
Automated reduction of model order reduces parasitic R, C, and L data and
produces a passive, realizable network for easy and efficient simulation, with no
significant loss in accuracy.
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