ADRF66120 pages

VCC1

VCC11

VCC10

VCC9

VCOVTUNE

CPOUT

REFIN

MUXOUT

DNC

IFOUT1+

IFOUT1-

DECL1

41

34

33

2

47

43

42

40

39

38

8

9
10 DECL3

VCO
LDO

7
Ref In
Divider

VCC2 16

11 DECL4

VPTAT

PFD

12 DECL5

PLL
CHARGE PUMP
3.3V LDO

Lock
Detect

VCC4 27

VCO
BUFFER
LDO

VCO BAND
SWITCH LDO

VCC3 20

45 LDO4

Scan
35 RFIN1

VCC5 28
N Divider

VCO

Divide by
1-32

VCC6 29

36 RFBCT1

VCO
VCC7 31

26 RFIN2

...

25 RFBCT2
VCO

VCC8 32

INT N
DIVIDER
2.5V
LDO

44 LDO3

SPI
2.5V
LDO
17

18

19

13

14

21

22

23

15

30

DNC

IFOUT2+

IFOUT2-

LDO1

LDO2

48

LOOUT-

37

CS

24

LOOUT+

6

SDIO

3

SCLK

1

GND

5

LO
DIV
3.3V
LDO

4

EXTVCOIN-

GND

EXTVCOIN+

SPI
Control

GND

Multi-Band/ Multi-Standard Cellular Base Station Diversity
Receivers
Wideband Radio Link Diversity Downconverters
Multi-Mode Cellular Extenders and Picocells

46

EXPOSED
PADDLE

GND

APPLICATIONS

FUNCTIONAL BLOCK DIAGRAM

GND

RF Frequency 700 MHz to 3000 MHz continuous
LO Frequency 200 MHz to 2700 MHz, High or Low side Inject
IF Range 40 – 500 MHz
Power Conversion Gain of 9.2 dB
SSB Noise Figure of 11.3 dB
Input IP3 of 28 dBm
Input P1dB of 10 dBm
Typical LO Drive of 0 dBm
Single-ended, 50 RF Port
Single Ended or Balanced LO Input Port
Serial Port Interface (SPI) Control on All Functions
Exposed Paddle 7 x 7 mm, 48 Lead LFCSP Package

VCC12

FEATURES

GND

Preliminary Technical Data

700 MHz to 3000MHz Dual Passive Receive
Mixer with Integrated PLL and VCO
ADRF6612

Figure 1. ADRF6612 Block Diagram

GENERAL DESCRIPTION
The ADRF6612 is a dual RF mixer + IF amplifier with
integrated PLL and VCO. The ADRF6612 uses revolutionary
broadband square wave limiting LO amplifiers to achieve an
unprecedented RF bandwidth of 700 to 2700MHz. Unlike
narrowband sine wave LO amplifier solutions, the LO can be
applied either above or below the RF input over an extremely
wide bandwidth. Energy storage elements are not utilized in the
LO amplifier so DC current consumption also decreases with
decreasing LO frequency.
The ADRF6612 utilizes highly linear doubly balanced passive
mixer cores with integrated RF and LO balancing circuits to
allow for single-ended operation. Integrated RF baluns allow for
optimal performance over the 700 to 3000 MHz RF input
frequency. The balanced passive mixer arrangement provides
outstanding LO to RF and LO to IF leakages, excellent RF to IF
isolation, and excellent intermodulation performance over the
full RF bandwidth.
The balanced mixer cores provide extremely high input
linearity allowing the device to be used in demanding wideband
applications where in-band blocking signals may otherwise
result in the degradation of dynamic range. Noise Performance
under blocking is comparable to narrowband passive mixer

designs. High linearity IF buffer amplifiers follow the passive
mixer cores, yielding typical power conversion gains of 9dB
typical, and can be matched to a wide range of output
impedances.
The PLL architecture supports both integer-N and fractional-N
operation and can generate the entire LO frequency range of
200 MHz to 2.7 GHz using an external reference input
frequency anywhere in the range of 12 MHz to 320 MHz. An
external loop filter provides flexibility in trading off phase noise vs.
acquisition time. To reduce fractional spurs in fractional-N mode,
a sigma-delta (Σ-Δ) modulator controls the post- VCO
programmable divider. The VCO consists of multiple VCO
cores. 4 cores support wideband operation. 2 additional cores
provide MC-GSM support.
All features of the ADRF6612 are controlled via a 3-wire serial
port interface resulting in optimum performance and minimum
external components.
The ADRF6612 is fabricated using a BiCMOS high
performance IC process. The device will be available in a
7mm x 7mm 48-lead LFCSP package and operates over a −40°C
to +85°C temperature range. An evaluation board is available.

Rev. PrA
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responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
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